Linux kernel 7.3 has been released, bringing many exciting new features and improvements. Collabora has made significant contributions to the Linux kernel over many years, and this release is no different.

Our engineers authored 111 patches, with contributions from 17 different developers. On top of that, many people contributed through reviews and maintenance work. While most contributions focused on graphics, the work also spanned several other areas, including Rust, hardware enablement, power management, and multimedia.

For a broader overview of the improvements introduced in Linux 7.3, see the following LWN articles:

• The beginning of the 7.3 merge window
• The rest of the 7.3 merge window

DRM core

Cristian Ciocaltea fixed a couple of data races in the DRM bridge code by ensuring the bridge lists are only read and modified while holding the proper lock, preventing potential corruption from concurrent access.

Derek Foreman added a documentation patch that allows hardware with a scaler in the writeback connector to be supported by the kernel. Now the writeback framebuffer dimensions can be different from the CRTC dimensions, and drivers should either fail or scale the writeback in such cases.

Laura Nao worked on a cleanup of DRM core that removed the DRIVER_GEM_GPUVA feature flag. The flag had no relevant purpose and provided no benefit.

Leandro Ribeiro worked on a patchset that allows display controllers that do not support the PREMULTI blend mode to be properly upstreamed. Before this, DRM would require PREMULTI to be present when creating a blend mode property, which prevented this kind of hardware from being upstreamed. This restriction is now gone.

Nicolas Frattaroli ensured that hot-plug events would always contain the connector ID passed to userspace. Hot-plug events could be sent without identifying the connector that caused them, and userspace would have to figure out the connector in order to execute a modeset and wake up the display. In some cases, detecting the correct connector was impossible, leading to a disabled output unless the connector was manually re-plugged. Now userspace can reliably tell which connector caused the event.

Nicolas also worked on the DRM "color format" property. With it, compositors can choose the color output format sent to a display sink rather than relying on driver decisions. Userspace can control whether a display link is going to use full RGB, YCbCr444, YCbCr422, or YCbCr420. The modes supported by the sink should be discovered from the EDID and are not in the scope of this work.

Rust and Tyr

Development of Tyr, a Rust driver for the Arm Mali-G610 GPU, is making excellent progress. Recent contributions from Boris Brezillon, Daniel Almeida, and Deborah Brouwer are pushing the project forward and helping lay the groundwork for Rust-based GPU drivers in the Linux kernel.

Deborah spoke about Tyr at this year's XDC in Toronto. A blog post was published for those who missed the talk, offering a closer look at Tyr's progress and the work involved in bringing a Rust GPU driver to the DRM subsystem. It is a worthwhile read for anyone following Tyr itself and for those interested in the growing role of Rust in the Linux kernel: Upstreaming Tyr: Rust, DRM, and the Linux Kernel.

In the context of Rust work, Laura Nao worked on a Rust I/O patch providing a way for the kernel to read and write system memory that may also be accessed by hardware, such as a GPU. It uses volatile accessors to ensure safe access to shared memory that may be concurrently accessed by external hardware. This patch is part of a larger series that reworks I/O types in the Linux Rust infrastructure.

MediaTek

AngeloGioacchino Del Regno worked on several changes to improve the MediaTek ecosystem.

First, he proposed fixes for the MT8195-class HDMI PHY, found in the MT8195, MT8188, and Genio variants. The fixes correct the PLL and TMDS clock-divider calculations to support all modes requiring data rates above 3.4Gbps. The fixes were successfully tested with a target mode of 3840x2160 at 60Hz.

He also made reset optional for MT8196. On most MT8196 boards, LVTS hardware may be shared with SoC-internal MCUs. So resetting LVTS may produce a severe slowdown or a thermal protection reset, as some MCUs may be reading a very high or very low temperature while LVTS is being reset. Making resets optional allows these issues to be avoided.

Another contribution from Angelo was a major refactor that restructures the entire multimedia part of MediaTek SoCs. This was the first part of an ongoing effort. It adds support for properly advertising the MediaTek Mute-X IP as a source of trigger signals, which previously relied on a workaround. It also starts reworking MediaTek MMSYS, adding the boilerplate to decouple component type and component instance number. Currently, all of the components in MediaTek DRM, and therefore also in the MMSYS driver, are put into a single ever-growing enum. As the number of components grows uncontrollably, this creates oversized arrays that could be much smaller. This is messy, so this rework should simplify maintenance and provide a more scalable foundation for upcoming MediaTek SoCs.

Angelo also added support for the DirectCTL HFRPSYS power domains found on the MT8196 SoC and proposed a fix to respect power-domain relationships during error cleanup, avoiding hardware lockups in specific cases. This was tested extensively on various MediaTek SoCs.

Finally, Angelo worked on a patchset to properly describe the UART AP_DMA controller in the device trees of several MediaTek devices. This series also removes a deprecated property from the MediaTek MT6795 device tree.

Louis-Alexis Eyraud fixed a leak in the driver that implements clock control for MediaTek SoCs. On PLL registration failure, the code forgot to free the I/O memory mapped for the FHCTL node. The same leak did not occur in the function that unregisters PLLs. We added a function shared by both paths, eliminating the problem.

Louis-Alexis also added MT6365 PMIC supplies to a few devices. Several MediaTek and Radxa boards based on the MT8370, MT8390, or MT8395 SoCs integrate the MT6365 PMIC. Recently, the device-tree bindings for this PMIC have gained properties to describe the power inputs for its various buck and LDO regulators. In this work, we added supplies for these PMIC regulators to the following board device trees: MTK Genio 510-EVK, MTK Genio 700-EVK, MTK Genio 1200-EVK, and Radxa NIO-12L.

Rockchip

Cristian Ciocaltea continued working on improving HDMI support for the recent Rockchip platforms.

The first contribution is a series of bug fixes and cleanups for the Rockchip Samsung HDPTX PHY driver. The first part of the series addresses clock rate calculation and synchronization issues. Specifically, it fixes edge cases where an external component (like a bootloader) pre-programs the PHY PLL or where the color depth (bpc) changes while the modeline stays constant. The second part focuses on code cleanup and modernizing register access. It drops deprecated code in favor of more suitable approaches. Finally, it refactors the driver to use standard bitfield macros consistently, improving code quality and maintainability.

Another improvement from Cristian was a set of fixes for the VOP2 display controller driver, focusing on RK3588/RK3568 boards when using multiple display outputs. Start/stop transitions could trigger a timeout during overlay layer configuration. This happened because race conditions during multiple atomic commits could cause the wait to poll values that were accidentally overwritten.

He also added YUV support for the VOP2 driver's background color support. So far, it has supported only RGB formats. This work adds all the needed RGB-to-YCbCr conversions and expands support to YUV, covering all color spaces supported by the display controller: BT601L, BT601F, BT709L, and BT2020L.

And last but not least, Cristian fixed a resource leak and use-after-free in the Rockchip DW DisplayPort Transmitter driver by adding AUX channel cleanup to the Synopsys DesignWare DisplayPort library and wiring it into driver removal and initialization failure paths.

Exciting changes in other GPU drivers

Adrián Larumbe worked on a series to improve support for Vulkan sparse resources in Panthor, the kernel driver for the 10th-generation Arm Mali GPUs. This series implements sparse mappings. Due to the lack of a Memory Management Unit (MMU) in the GPU, they are implemented using a dummy object over which sparse mappings requested through VM_BIND are mapped cyclically.

This drastically reduces the number of map operations required to create large sparse-resident resources. With the new VM_BIND sparse-mapping features, a single Vulkan sparse-map operation and sparse-resident resource initialization can each be performed with a single map operation.

Dmitry Osipenko reverted a change that introduced a regression in virtio-gpu. It would let guest userspace import udmabuf into vrend, but because vrend doesn't support guest blobs, 3D operations with the imported blob failed. Reverting this patch fixed the problem. He also merged the virtio-gpu S4 hibernation support contributed by Intel, which allows a VM's hibernation memory image to be migrated to another machine and successfully restored there. Note that hibernation is currently supported only for the virtio-gpu 2D device, while VirGL hibernation remains unsupported.

Faith Ekstrand fixed a Nouveau issue affecting Tegra devices. Uncached maps would be translated to device memory, causing unaligned access by userspace and consequently a SIGBUS. Now it uses write-combined maps to ensure proper access.

Other contributions

This section covers contributions across other parts of the kernel.

Matthew Leach fixed an issue with the ath12k Wi-Fi driver. Its survey array was being accessed using band-local indexes rather than the global index provided by mac80211, resulting in surveys for 5GHz and 6GHz channels returning values from 2.4GHz slots (making them unusable). This work fixes the indexing, and the survey data is now correct for all these bands.

Nícolas Prado landed two commits that significantly improve the reliability of HDMI audio jack state reporting on systems with AMD display controllers. The first patch fixes the AMD display controller driver so audio sink drivers are notified whenever a sink (such as an HDMI cable) disconnects, rather than only during a DRM atomic commit. The second patch makes the HDA HDMI audio codec driver resume whenever the display driver requests it, which can happen when a new sink is detected. Together, these changes ensure the audio jack state is reported correctly across HDMI cable disconnect/reconnect and system suspend/resume cycles.

Robert Mader proposed a sensible change to udmabuf. This driver is becoming quite popular, with many userspace projects using it: libcamera, GStreamer, Mesa, KWin, and Weston. Before this series, it imposed a 64MB size limit on buffer allocations, which was too low for many high-resolution use cases. For example, 8K video buffers, or even 4K with non-subsampled video formats and high bit depths, can exceed this limit. Removing it makes udmabuf more useful for these use cases.

List of contributions

Below is a full list of contributions made by Collabora for the 7.3 release, as recorded in the git commit history:

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